Verilog Shift Operator Multiplication: 65*37 Example

Today’s challenge is: Using Verilog shift operators, implement the multiplication of 65 × 37. We’ll break down the problem, provide a clear solution, and explain the code in a beginner-friendly way. Let’s get started and boost your Verilog coding skills!

Question: Using Verilog shift operators, implement the multiplication of 65 × 37. Write a Verilog module demonstrating this approach.

Understanding the Problem

The goal is to multiply 65 by 37 using shift operators in Verilog, avoiding the * operator. Shift operators (<< and >>) are efficient because they manipulate bits, which is faster in hardware. We need to:

• Represent 65 and 37 in binary.
• Use shifts to perform multiplication.
• Produce the correct result (65 * 37 = 2405).
• Write synthesizable Verilog code.

Approach to Solve the Problem

Multiplication can be broken down using bit manipulation:

• Convert 37 to binary (37 = 100101).
• For each ‘1’ bit in 37, shift 65 left by the bit’s position and add the results.
• Use << for left shifts and + for addition.
• Store the result in a variable.

Steps:

1. Express 37 as 2^5 + 2^2 + 2^0 (since 37 = 32 + 4 + 1).
2. Compute 65 * 37 as (65 << 5) + (65 << 2) + (65 << 0).
3. Sum the shifted values to get 2405.

Solution

Here’s the Verilog code to multiply 65 by 37 using shift operators:

module mult_shift;
  reg [31:0] result; // Store result
  reg [31:0] a;      // Input 65
  reg [31:0] b;      // Input 37

  initial begin
    a = 65;          // Set a to 65
    b = 37;          // Set b to 37
    result = 0;      // Initialize result

    // Multiply using shifts based on b's bits
    if (b[0]) result = result + (a << 0); // Bit 0: 65 * 2^0
    if (b[1]) result = result + (a << 1); // Bit 1: 65 * 2^1
    if (b[2]) result = result + (a << 2); // Bit 2: 65 * 2^2
    if (b[3]) result = result + (a << 3); // Bit 3: 65 * 2^3
    if (b[4]) result = result + (a << 4); // Bit 4: 65 * 2^4
    if (b[5]) result = result + (a << 5); // Bit 5: 65 * 2^5

    $display("65 * 37 = %0d", result); // Display result (2405)
  end
endmodule

Code Explanation

• Variables: a (65), b (37), and result are 32-bit registers.
• Shift Logic: Check each bit of b (37 = 100101). If the bit is 1, shift a (65) left by the bit position and add to result.
• Output: Displays 2405, the product of 65 * 37.
• Why Shifts?: Left shifts multiply by powers of 2 (e.g., a << 5 is 65 * 32), which is efficient in hardware.
  
  

Read more: Efficient Multiplication in Verilog Using Left Shift Operators