Verilog Literals Explained: Master Constants for VLSI Design

Verilog uses literals to define constants in code. These literals help describe values precisely and are fundamental in digital circuit simulation and synthesis.

Types of Verilog Literals

1. Numeric Literals:

Integer literals represent numerical values and can be specified in different bases: decimal, binary, octal, or hexadecimal. The general syntax is:

[size]'[base][value]

Size: Optional, specifies the bit-width of the literal (ex, 8 for 8 bits).

If the size is omitted, Verilog assumes a default width (typically 32 bits, but tool-dependent).
Base: Specifies the number base:
b for binary (ex, 4'b1010)
o for octal (ex, 4'o12)
h for hexadecimal (ex, 8'hA5)
d for decimal (ex, 8'd42)

Value: The actual number in the specified base 

Examples:

4'b1010     // 4-bit binary literal, value = 10 in decimal
8'hFF       // 8-bit hexadecimal literal, value = 255 in decimal
6'd42       // 6-bit decimal literal, value = 42
'o77        // Octal literal, unsized, value = 63 in decimal

2. Real Literals

Real literals represent floating-point numbers and are written in decimal notation or scientific notation. Examples:

3.14        // Decimal real literal
2.5e3       // Scientific notation, value = 2500.0
-0.001      // Negative real literal

3. String Literals

String literals are sequences of characters enclosed in double quotes (" "). They are used for tasks like displaying text in simulation. Examples:

"Hello VLSI 360" // String literal

Strings can be used with system tasks like $display:

$display("Wind Speed: %d", 42); // Outputs: Wind Speed: 42

4. Time Literals

Time literals are used to specify delays or simulation time and are written with a numerical value followed by a time unit (ex, ns, ps, us). Examples:

10ns        // 10 nanoseconds
2.5ps       // 2.5 picoseconds

These are commonly used in #delay constructs:

#5ns;     // Delay of 5 nanoseconds

5. Logic Value Literals

Verilog supports four-state logic values for bits: 0, 1, x (unknown), and z (high-impedance). These can appear in literals, especially in binary or vector assignments. Examples:

4'b10xz     // 4-bit binary literal with 1, 0, x, and z

Verilog, there are four basic logic values:

0: Logic LOW or false, connected to ground (GND). 1: Logic HIGH or true, connected to the power supply (Vdd) x: Unknown, could be 0 or 1, used in simulations for uncertain states z: High impedance or floating, not connected to power or ground, often used for tri-state signals

6. Parameter and Constant Literals

Literals are often used with parameter or localparam to define constants.

parameter WIDTH = 8;        // Decimal literal
parameter MASK  = 8'hF0;    // Hexadecimal literal

Notes:

• Unsized Literals: If no size is specified (ex, 'hA), Verilog assumes a default width, typically 32 bits.
  
• Underscores: You can use underscores (_) in literals for readability (ex, 8'b1010_1100).
  
• Case Sensitivity: Base specifiers (b, B, h, H etc.) are case-insensitive.
  
• Context: Literals are used in assignments, expressions, or as arguments to system tasks.